Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe2/MoTe2 Stack Channel

  • Park, Sam; 
  • Jeong, Yeonsu; 
  • Jin, Hye-Jin; 
  • Park, Junkyu; 
  • Jang, Hyenam; 
  • 외 8명
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초록

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe2 and MoTe2 flakes are vertically stacked on the gate dielectric, and bottom p-MoTe, performs as a channel for hole transport. Interestingly, the WSe2/MoTe2 stack interface functions as a hole trapping site where traps behave in a nonvolatile manner, although trapping/detrapping can be controlled by gate voltage (V-GS). Memory retention after high V-GS pulse appears longer than 10000 s, and the Program/Erase ratio in a drain current is higher than 200. Moreover, the traps are delicately controllable even with small V-GS, which indicates that a neuromorphic memory is also possible with our heterojunction stack FETs. Our stack channel FET demonstrates neuromorphic memory behavior of similar to 94% recognition accuracy.

키워드

stack channel FET; WSe2/MoTe2 heterojunction; interface traps; nonvolatile memory; neuromorphic device
제목
Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe2/MoTe2 Stack Channel
저자
Park, Sam; Jeong, Yeonsu; Jin, Hye-Jin; Park, Junkyu; Jang, Hyenam; Lee, Sol; Huh, Woong; Cho, Hyunmin; Shin, Hyung Gon; Kim, Kwanpyo; Lee, Chul-Ho; Choi, Shinhyun; Im, Seongil
DOI
10.1021/acsnano.0c05393
발행일
2020-09-22
유형
Article
저널명
ACS Nano
권
14
호
9
페이지
12064 ~ 12071