ComPASS: A Compatible PIM Protocol Architecture and Scheduling Solution for Processor-PIM Collaboration

초록

With growing demands from memory-bound applications, Processing-In-Memory (PIM) architectures have emerged as a promising way to reduce data movement. However, existing PIM designs face challenges in compatibility and efficiency due to limited command/address space and the overhead of switching between PIM and normal memory modes. To address these limitations, we propose ComPASS, a compatible PIM protocol and scheduling solution that enables efficient processor-PIM integration. ComPASS introduces PIM-ACT, a new memory command that triggers multi-bank activation and PIM operations at once, allowing for compatibility across diverse PIM architectures. It also adds a PIM request generator within the memory controller, which can serve all PIM devices compliant with PIM-ACT, avoiding device-specific integration. In addition, ComPASS supports architecture-aware optimizations, enabling each PIM device to use a customized PIM-ACT configuration tailored to its architecture without compromising compatibility. For efficient scheduling of both PIM and conventional memory requests, ComPASS proposes static and adaptive scheduling that maintain PIM throughput while allocating bandwidth to conventional workloads for overall system efficiency. Our evaluation shows that ComPASS consistently meets PIM performance targets by achieving up to 10.75 × GEMV speedup on LPDDR-PIM over non-PIM environments, even under co-execution with memory-intensive CPU workloads, thereby demonstrating both efficiency and compatibility.