이더넷 환경 상에서의 FPGA 기반 네트워크 침입 탐지

초록

In this paper, we propose a method to increase the security of the network by detecting the network intrusion by analyzing the packet using the FPGA(Field Programmable Gate Array) in the Ethernet environment and restricting the reception of the abnormal packet. To detect abnormal packets, packets received at each station in the network are analyzed according to the rules set by the host using the FPGA. The proposed method shows superior performance and stronger security compared to the conventional rule comparison method implemented in software, without affecting host’s performance.