Wakeup-Free and Endurance-Robust Ferroelectric Field-Effect Transistor Memory Using High Pressure Annealing

  • Manh-Cuong Nguyen
  • Kim, Sihyun
  • Lee, Kitae
  • Yim, Ji-Yong
  • Choi, Rino
  • 외 1명
Citations

WEB OF SCIENCE

60
Citations

SCOPUS

60

초록

Wakeup-free and endurance-robust HfZrO2 (HZO) ferroelectric field-effect transistor (FeFET) was fabricated on a silicon-on-insulator substrate. After a high-pressure forming gas annealing as the last alloy step, the performance and endurance of the FeFETs were significantly improved by trap states reduction, polarization enhancement, and wake-up elimination. As the result, the FeFETs show superior endurance exceeding 10(10) cycles and robust retention behavior at program/erase biases of +/- 3.5V and pulse width of 100 ns. These results indicate that appropriate thermal treatment for the interlayer and ferroelectric material could substantially improve FeFET performance and reliability.

키워드

FeFETsLogic gatesThreshold voltageAnnealingTinVoltage measurementTransistorsFerroelectric FET (FeFET)HZOendurance characteristics of FeFEThigh-pressure annealingTRANSIENT NEGATIVE CAPACITANCEFEFETSFET
제목
Wakeup-Free and Endurance-Robust Ferroelectric Field-Effect Transistor Memory Using High Pressure Annealing
저자
Manh-Cuong NguyenKim, SihyunLee, KitaeYim, Ji-YongChoi, RinoKwon, Daewoong
DOI
10.1109/LED.2021.3096248
발행일
2021-09
유형
Article
저널명
IEEE Electron Device Letters
42
9
페이지
1295 ~ 1298