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Wakeup-Free and Endurance-Robust Ferroelectric Field-Effect Transistor Memory Using High Pressure Annealing
- Manh-Cuong Nguyen;
- Kim, Sihyun;
- Lee, Kitae;
- Yim, Ji-Yong;
- Choi, Rino;
- 외 1명
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Wakeup-free and endurance-robust HfZrO2 (HZO) ferroelectric field-effect transistor (FeFET) was fabricated on a silicon-on-insulator substrate. After a high-pressure forming gas annealing as the last alloy step, the performance and endurance of the FeFETs were significantly improved by trap states reduction, polarization enhancement, and wake-up elimination. As the result, the FeFETs show superior endurance exceeding 10(10) cycles and robust retention behavior at program/erase biases of +/- 3.5V and pulse width of 100 ns. These results indicate that appropriate thermal treatment for the interlayer and ferroelectric material could substantially improve FeFET performance and reliability.
키워드
FeFETs; Logic gates; Threshold voltage; Annealing; Tin; Voltage measurement; Transistors; Ferroelectric FET (FeFET); HZO; endurance characteristics of FeFET; high-pressure annealing; TRANSIENT NEGATIVE CAPACITANCE; FEFETS; FET
- 제목
- Wakeup-Free and Endurance-Robust Ferroelectric Field-Effect Transistor Memory Using High Pressure Annealing
- 저자
- Manh-Cuong Nguyen; Kim, Sihyun; Lee, Kitae; Yim, Ji-Yong; Choi, Rino; Kwon, Daewoong
- 발행일
- 2021-09
- 유형
- Article
- 권
- 42
- 호
- 9
- 페이지
- 1295 ~ 1298