Silane-Induced Epoxy Crosslinking for Adhesive-Free 3D Chip Integration

초록

In this study, two different types of silanes; glycidoxypropyltrimethoxysilane (GPTMS) and aminopropyltriethoxysilane (APTES), were coated onto dielectric (SiO2) surfaces to achieve multi-chip stacking without the use of adhesive films. The silanes were applied to SiO2 by immersion, undergoing hydrolysis and condensation. Subsequently, the amine groups of APTES reacted with the epoxide groups of GPTMS through a ring-opening reaction, leading to epoxy crosslinking between stacked chips. Using this silane-based strategy, four silicon chips were successfully stacked without adhesives such as die-attach films. The interfacial surfaces of the stacked chips exhibited no voids or defects, confirming strong adhesion between the silanes and chips. Therefore, GPTMS and APTES functionalization of SiO2 provides reliable adhesion strength and a promising approach for 3D chip integration. - 본 연구는 2025년도 정부(교육부) 재원으로 한국연구재단의 지원을 받아 수행된 기초연구사업임(RS-2022-NR070869). Keywords: Epoxy Crosslinking, Silane, Semiconductor packaging, Adhesive-free, 3D chip integration