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Deep-Level Trap Engineering in Sn-Doped β-Ga2O3 MISFETs for Optoelectronic Memory and Reconfigurable Logic Application
- Choi, Jin Hyuk;
- Kim, Gyeong Seop;
- Kang, Ji-Hoon;
- Lee, Young Tack
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0초록
Nonvolatile memory platforms that avoid conventional floating-gated charge-storage layers are attracting increasing interest for next-generation data-centric electronic systems. In this work, we present a Sn-doped beta-gallium oxide (beta-Ga2O3) metal-insulator-semiconductor field-effect transistor (MISFET)-based optoelectronic memory (OEM) device that utilizes intrinsic deep-level trap states in the beta-Ga(2)O(3 )channel as nonvolatile charge storage sites. The beta-Ga2O3 OEM device exhibits stable transistor operation with a high drain current on/off ratio (>10(5)) and a near-ideal subthreshold slope (60 mV/dec). In addition, programmable threshold voltage (V-th) modulation is achieved through electrical erasing (EE) and optical programming (OP) processes, resulting in a wide memory window of 4.2 V by applying an EE pulse of 4 V and an OP pulse under 405 nm deep blue illumination. The optically and electrically defined memory states show stable memory retention (>10(3 )s) and memory endurance (>10(3 )cycles). Furthermore, we integrate the OEM device into a resistive-load inverter circuit to demonstrate memory-state-dependent logic operation. By modulating the memory state, the same circuit can be reconfigured between a conventional inverter mode and an input-independent logic mode. These results highlight the potential of the beta-Ga2O3 OEM as a scalable platform for next-generation nonvolatile memory technologies.
키워드
- 제목
- Deep-Level Trap Engineering in Sn-Doped β-Ga2O3 MISFETs for Optoelectronic Memory and Reconfigurable Logic Application
- 저자
- Choi, Jin Hyuk; Kim, Gyeong Seop; Kang, Ji-Hoon; Lee, Young Tack
- 발행일
- 2026-09
- 유형
- Article
- 권
- 8
- 호
- 18
- 페이지
- 8069 ~ 8076
- 언어
- ENG
- 출판사
- AMER CHEMICAL SOC
- 발행국가
- 미국
- 분량
- 8 페이지
- ISSN
- E 2637-6113
P 2637-6113