A 12∼14-Bit SAR-SS Hybrid ADC with SS Bit Shifting Resolution Reconfigurable Method for Bio-Signal Processing

  • Moon, Cheol Woo
  • Yoon, Kwang Sub
  • Lee, Jonghwan
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초록

This paper presents a low-power, high-resolution reconfigurable hybrid ADC for bio-electrical signal processing. The proposed ADC contains a SAR ADC for the most significant bit (MSB) and a single-slope ADC for the least significant bit (LSB). To solve the issue of exponentially increasing sampling speed based on the resolution of the single-slope ADC, the SAR ADC is designed to be reconfigurable with a resolution of 8-10-bit, while the single-slope ADC is configured with a resolution of 4-bit. To achieve this resolution reconfiguration, the bit shifting method is proposed and implemented with reconfigurable SAR logic circuit and 4-bit single-slope digital ramp generator. Measurement results demonstrate the power consumption of 34.0 uW, which includes analog power of 23.8 uW and digital power of 10.2 uW, INL/DNL of +/- 3.5 LSB and -1.0/+2.5 LSB. The ENOB and FoM are measured to be 10.8 bits and 53 fJ/step, respectively.

키워드

reconfigurablehybridSARsingle slopeADC
제목
A 12∼14-Bit SAR-SS Hybrid ADC with SS Bit Shifting Resolution Reconfigurable Method for Bio-Signal Processing
저자
Moon, Cheol WooYoon, Kwang SubLee, Jonghwan
DOI
10.3390/electronics12244916
발행일
2023-12
유형
Article
저널명
Electronics (Basel)
12
24