The effect of compiler's optimization on the performance of superscalar processors

초록

There are two ways to improve the performance of superscalar processors. One is the software technology related to compiler design and the other is the hardware technology such as processor architectures and cache design. In this paper, we present optimization techique used in general optimization levels of GNU C compiler and analyze the effects of compiler's optimizations on the performance of an in-order and an out-of-order issue superscalar processors. We also propose new instruction window design which uses one additional buffer(shelter buffer) that can resolve the bottleneck of instruction window. The simulation results show that the performance of Whetstone benchmark which has 18% of floating-point instructions(mult/div:5%) improves up to 11.58% and 13.03% in execution time and issue rate respectively, and up to 30.11% and 43.08% respectively if both use the same number of instruction window entries(not including the shelter buffer)