A 6bit 1GS/s Flash A/D Converter with FIR Pre-amplifier

초록

A 6-bit flash A/D Converter with Full Input Range Pre-amplifier is introduced in this paper. With the input range extension, the LSB is enlarged and the requirements for the component matching is released, reducing the sizes of transistors and the power consumption. The proposed flash architecture employs different input stage in the pre-amplifier for rail-to-rail input range. Combined with the voltage interpolation technique, the power consumption can be reduced further more. The simulation result show a conversion rate of 1GS/s, SNDR of 35.1dB, DNL/INL of ±0.45LSB/±0.65LSB, and power dissipation of 211mW at 1.8V. The proposed A/D Converter is simulated in a 0.18um CMOS technology.