Characterization of analogue Monolithic Active Pixel Sensor test structures implemented in a 65 nm CMOS imaging process

초록

Analogue test structures were fabricated using the Tower Partners Semiconductor Co. CMOS 65 nm ISC process. The purpose was to characterize and qualify this process and to optimize the sensor for the next generation of Monolithic Active Pixels Sensors for high-energy physics. The technology was explored in several variants which differed by: doping levels, pixel geometries and pixel pitches (10-25 mu m). These variants have been tested following exposure to varying levels of irradiation up to 3 MGy and 10(16) 1 MeV n(eq) cm(-2). Here the results from prototypes that feature direct analogue output of a 4 x 4 pixel matrix are reported, allowing the systematic and detailed study of charge collection properties. Measurements were taken both using Fe-55 X-ray sources and in beam tests using minimum ionizing particles. The results not only demonstrate the feasibility of using this technology for particle detection but also serve as a reference for future applications and optimizations.

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