A CMOS Third Order ΔΣ Modulator with Inverter-Based Integrators

초록

This paper presents a CMOS third order ΔΣ modulator with inverter-based integrators for low power audio signal processing application. In order to minimize the power consumption of the proposed modulator, the inverters embedded into integrators and an analog adder operating in the subthreshold region were implemented on an 180nm CMOS technology with digital and analog power supply of 1.8V and 0.8V, respectively. The measurement results demonstrated ENOB of 13.1bit, DR of 86.1dB, total power dissipation of 92uW, and FOM(walden) of 260 fJ/step at sampling frequency of 2.56 MHz and input signal frequency of 2.5kHz.