Design of 10-bit 100MS/s CMOS A/D converter with low power Multipying Digital to Analog Converter

초록

In this paper, a fully differential low power 10-Bit 100MHz pipeline A/D converter is presented a low power MDAC(Multiplying Digital to Analog Converter). Small power consumption is achieved by using low power MDAC. The simulation results show a conversion rate of 100MHz, SFDR of 57dB, DNL/INL of ±0.5LSB/±1LSB and a power dissipation of 220 mW at single supply voltage of 3.3 V