A 10-Bit 210MS/s CMOS D/A Converter for WLAN

YOON KWANG SUB

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A 10-Bit 210MS/s CMOS D/A Converter for WLAN

영문제목

YOON KWANG SUB

초록

This paper describes a 10-Bit 210MHz CMOS current-mode Digital to Analog Converter (DAC) consists of 6 MSB current cell matrix stage, 2 mSB unary current source stage, and 2 LSB binary weighting stage.

제목: A 10-Bit 210MS/s CMOS D/A Converter for WLAN

제목 (타언어): 영문제목

저자: YOON KWANG SUB

학회명: 한국반도체학술대회