A Low Power Fourth Order ΣΔ CMOS Modulator with Subthreshold Amplifier

초록

This paper presents a low power ΣΔ CMOS modulator with op-amps operating in subthreshold region for processing bio-signals. In order to reduce a power consumption of the proposed fourth order ΣΔ CMOS modulator, two op- amps for implementation of integrators are designed to be operating in subthreshold region. For furthermore power reduction, the first two integrators are re-utilized with switches and capacitors to act as the second two integrators. The proposed circuit was fabricated in a 0.18um CMOS n-well 1 poly 6 metal process with the active chip core area of 900μm x 600μm and the power consumption of 360μW. Measurement results were demonstrated to be SNDR of 79 dB, DR of 78dB, and ENOB of 12.9 bits at the input frequency of 1kHz and the clock frequency of 256kHz.