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Real-Time Lane Detection in Low-Power NPU Device
초록
Since the introduction of Deep Neural Networks (DNNs), the lane detection network has seen substantial advancements, enabling systems that can provide real-time lane departure warnings and active lane keeping during vehicle operation. Recently, Lightweight lane detection networks enable accurate lane detection at exceptionally high inference speeds. However, such performance has been usually achieved in high-performance Graphics Processing Units (GPUs), which may not be useful in autonomous driving or robotic applications due to power limitations. To solve this problem, Neural Processing Units (NPUs) have been developed. The NPU consumes extremely low power and is optimized for neural network computations. Moreover, the minimal performance degradation associated with low power consumption makes it highly useful for applications in vehicles and robots. In this paper, we report the performances and problems of quantized networks for lane detection on NPU-equipped Embedded Boards. The performance retains about 104% of the RTX 4090's capabilities on the CULane benchmark and 70% on the TuSimple benchmark, while consuming only 0.54% of the power.
- 제목
- Real-Time Lane Detection in Low-Power NPU Device
- 제목 (타언어)
- 저전력 NPU 임베디드 보드 환경에서 실시간 차선 인식에 대한 연구
- 저자
- INWOOK SHIM
- 학회명
- 한국로봇종합학술대회
- 개최지
- 평창
- 학회 개최일
- 2025-02-12 ~ 2025-02-15