Enhanced Heat Dissipation of MgO Interlayer Dielectric in CMOS technology

초록

Complementary metal-oxide-semiconductor (CMOS) technology has been scaling down under a few nanometer technology node [1]. As the device is scaling down, there are many issues including increased temperature because of Joule heating in metal lines or devices [2, 3]. The temperature issue would be aggravated due to the low thermal conductivity of SiO2 (1.1 W/m?K) interlayer dielectric (ILD) [4]. MgO is known to have high thermal conductivity (43.2 W/m?K, 40 times higher than SiO2) at room temperature and implemented in LED package as the heat spreader [5, 6]. In this study, MgO thin-film is implemented as ILD and compared to SiO2 ILD to enhance heat dissipation in MOSFET. N-type MOSFETs were fabricated using Mo gate and Al2O3 gate insulator. MgO and SiO2 layers as ILD were deposited on at low temperature (<300 ℃) to avoid thermal effects on the device by an e-beam evaporator and plasma-enhanced chemical vapor deposition, respectively. The temperatures of capped MgO and SiO2 devices were measured using an IR camera during the operation of MOSFETs and efficiency of heat dissipation would be compared.

제목
Enhanced Heat Dissipation of MgO Interlayer Dielectric in CMOS technology
저자
RINO CHOI
학회명
2021 NANO KOREA
개최지
On-line