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초록
This paper suggests a new method for hardware evolution that changes its own structure to adapt to the environment. This process is performed on reconfigurable silicon medium, Xilinx 6216 FPGA. The chip supports gate-level function (e.g., AND, OR, XOR gates) configuration cell by cell and can be reconfigured partially or wholly � that is why we chose XC6216. Our object is the realization of desired digital circuit which adapt to its surrounding by evolutionary algorithm, Genetic Algorithm (GA). We can imagine similar situation such as mobile communication, autonomous robot in rough field, pattern recognition, etc. In this paper, configuration bit of FPGA is used as a chromosome for GA in encoded form. By using various evolutionary techniques, GA finds the architecture that adapts best to the environment, and changes its hardware structure accordingly. There are two types of hardware evolution: gate-level and function-level. In this paper, both methods are used, and each method is applied to its own application. One is the evolution of combinational circuit in gate-level and the other is that of adaptive equalization for digital communication channels in function-level. We performed autonomous design of digital circuit without any given constraint in gate-level evolution. And adaptive equalizer synthesis, a method of compensating for linear or nonlinear channel distortion at the receiver뭩 end in mobile communication, was done similarly on function level because the application requires large and complex structure which is very hard to implement in gate-level evolution.
- 제목
- Adaptive Hardware Evolution in Unexpected Environment
- 저자
- CHONG HO LEE
- 학회명
- AP-ASIC '99