4th Order ΣΔ Modulator Using Subthreshold OP-Amp

초록

This paper describes a low power 4th order ΣΔ modulator for an implantable chip to acquire bio signals such as EEG(Electroencephalogram) or EEG(Electrocardiography) and EMG(Electromyography). To reduce a power consumption of the proposed modulator, Subthreshold OP amp was used. And to reduce power consumption further, Time interleaving technique was used[1]. A test chip was fabricated in a 0.18um CMOS n-well 1 poly 6 metal process. The chip core area occupies 950um x 800um, and its power is 360uW with a 1.8V supply voltage. Measurement results show 85.71dB of SNDR and 78.3dB of DR. We achieve 13.9bit at the input signal bandwidth and clock frequency of 1kHz and 512kHz, respectively. FOMs are 143dB(FOM1) and 11.7pJ/step(FOM2).