Direct Silicon-Silicon Bonding via Urethane Crosslinking in 3D-IC Stacking and Advanced Semiconductor Packaging Process

초록

In this study, direct silicon-to-silicon chip bonding for 3D-IC stacking was successfully achieved using a dual strategy of silane modification and plasma treatment. The first silicon chip was modified with isocyanatopropyltriethoxysilane (ICPTES) to introduce isocyanate (?NCO) groups, while the second chip was treated with atmospheric oxygen plasma to generate hydroxyl (?OH) groups. The two surface-modified silicon chips were then bonded at 250 °C, which corresponds to a typical bonding temperature in semiconductor packaging processes. As a result, the chips were effectively bonded without any surface delamination. This strong adhesion originated from the formation of urethane (?NH?CO?O) linkages between the ?OH and ?NCO groups on the modified chip surfaces. - 본 연구는 2025년도 정부(교육부)의 재원으로 한국연구재단의 지원을 받아 수행된 기초연구사업임(RS-2022-NR070869).? Keywords: Direct silicon-silicon bonding, Urethane, Plasma treatment, Silane treatment, Semiconductor packaging