Low-fluctuation nonlinear model using incremental step pulse programming with memristive devices

  • Lee, Geun Ho
  • Kim, Tae-Hyeon
  • Youn, Sangwook
  • Park, Jinwoo
  • Kim, Sungjoon
  • 외 1명
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초록

On-chip learning in neuromorphic systems, wherein both training and inference are performed on memristive synaptic devices, has been actively studied recently. However, on-chip learning is often affected by the weightupdate linearity of memristive synaptic devices. Herein, we fabricated a Pt/Al2O3/TiOx/Ti/Pt stacked memristor device with excellent switching and reliability characteristics. Its weight-update linearity was analyzed via nonlinear A fitting through an on-chip simulation of the modified National Institute of Standards and Technology (MNIST) dataset. We confirmed the excellent recognition accuracy and low-fluctuation characteristics of the proposed model based on its similar characteristics to software learning. We obtained the perfect linear model and two types of nonlinear model characteristics of the memristor through incremental step pulse programming and performed an on-chip simulation. In addition, the characteristics of the measured cycle-to-cycle variation were reflected in the on-chip learning and were analyzed. We expect the low-fluctuation nonlinear model developed herein to be useful for on-chip learning owing to its excellent learning characteristics.

키워드

Neuromorphic systemMemristorOn -chip learningIncremental step pulse programmingWeight -update linearityLow -fluctuation nonlinear modelRESISTIVE SWITCHING MEMORYCOMPUTE-IN-MEMORYNEURAL-NETWORKSYNAPTIC TRANSISTORMODULATIONRRAM
제목
Low-fluctuation nonlinear model using incremental step pulse programming with memristive devices
저자
Lee, Geun HoKim, Tae-HyeonYoun, SangwookPark, JinwooKim, SungjoonKim, Hyungjin
DOI
10.1016/j.chaos.2023.113359
발행일
2023-05
유형
Article
저널명
Chaos, Solitons and Fractals
170