Circuit Design of a Ternary Flip-Flop Using Ternary Logic Gates

초록

We present the design of ternary flip-flop which is based on ternary logic so as to process ternary data. These flip-flop are fabricated with ternary voltage mode NOR, NAND, INVERTER gates. These logic gate circuit are designed using CMOS ad obtained the characteristics of a lower voltage, a lower power consumption as compared to other gates. These circuits have been simulated with the electrical paramaters of a standard 0.25 micro CMOS technology and 2.5 volts supply voltage. The Architecture of proposed ternary flip-flop is highly modular and well suited for VLSI implementation, only using ternary gates.