Design of High-Density and Low-Power Approximate Adders

초록

This paper presents design of high-density and low-power split-based approximate adders. The lower part is approximated using a combination of XOR gate, OR gate, and truncation to achieve a lower hardware complexity and lower power consumption. The proposed approximate adder (M-XORAA) achieves area and power reduction of 5.98% and 4.59%, respectively, when compared to Lower-Part OR Adder (LOA). Furthermore, the proposed design exhibits a substantial accuracy improvement with up to 33.18% of MED reduction of previously proposed split-based approximate adder. © 2025 IEEE.

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