C-DAC 비트 스위치에 다른 샘플링 시간을 인가하는 12-비트, 10-Msps SAR 변환기 설계

Design of a 12-bit 10-Msps SAR A/D converter with different sampling time applied to the bit-switches within C-DAC
  • YOON KWANG SUB

초록

This paper proposes a low power 12-bit, 10-Msps SAR A/D converter for bio-signal and sensor-signal processing. The proposed ADC based on 65nm CMOS process features a main block of SAR control logic/shift register array, comparator, CDAC array with different sampling time applied to each bit switches. The simulation results of the proposed circuit demonstrate the ENOB of 10.1-bit, DNL/INL of ±0.5LSB / ±1.2LSB, power consumption of 31.2uW, and Walden FoM of 2.8fJ/step.

제목
C-DAC 비트 스위치에 다른 샘플링 시간을 인가하는 12-비트, 10-Msps SAR 변환기 설계
제목 (타언어)
Design of a 12-bit 10-Msps SAR A/D converter with different sampling time applied to the bit-switches within C-DAC
저자
YOON KWANG SUB
학회명
대한전자공학회 하계학술대회
개최지
롯데호텔 제주(중문)
학회 개최일
2020-08-19 ~ 2020-08-21