12-bit Current-Mode Folding/Interpolation CMOS A/D Converter with 2 step Architecture

초록

An 12bit 20M/s current-mode folding and interpolation analog to digital converter (ADC) with multiplied folding amplifiers is proposed in this paper. A current-mode mutiplied folding amplifier is employed not only to reduce the number of reference current source, but also to decrease a power dissipation within the ADC. The proposed ADC is implemented by a 0.65um n-well CMOS single poly/double metal process. The simulation result shows a differential nonlinearity(DNL) of +/- 0.5LSB, an integral nonlinearity(INL) of +/- 1.0LSB, the power dissipation of 280mW with a power supply of 5V.