Hardware Circuits and Systems Design for Post-Quantum Cryptography-A Tutorial Brief

  • Xie, Jiafeng
  • Zhao, Wenfeng
  • Lee, Hanho
  • Roy, Debapriya Basu
  • Zhang, Xinmiao
Citations

WEB OF SCIENCE

26
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36

초록

Due to the increasing threats from possible large-scale quantum computers, post-quantum cryptography (PQC) has drawn significant attention from various communities recently. In particular, along with the National Institute of Standards and Technology (NIST) PQC standardization process, more works have gradually switched to the PQC hardware implementations. Following this trend, this tutorial brief, led by a group of experts in the field, aims to deliver a comprehensive tutorial on hardware circuits and systems design for PQC. After introducing primary arithmetic operations and algorithmic features of different PQC, we introduced related PQC hardware circuits and systems design techniques (from component to system levels). Future research and directions are also provided. This tutorial will provide useful information for the TCAS-II community and the broader Circuits and Systems Society.

키워드

HardwareNISTCircuits and systemsTutorialsComputersArithmeticStandardsArithmetic operationhardware cryptographic design for PQCcircuits and systems design techniquesRING-LWEPOLYNOMIAL MULTIPLICATIONMODULAR MULTIPLICATIONIMPLEMENTATIONEFFICIENTARCHITECTURESALGORITHMSREDUCTION
제목
Hardware Circuits and Systems Design for Post-Quantum Cryptography-A Tutorial Brief
저자
Xie, JiafengZhao, WenfengLee, HanhoRoy, Debapriya BasuZhang, Xinmiao
DOI
10.1109/TCSII.2024.3357836
발행일
2024-03
유형
Article
저널명
IEEE Transactions on Circuits and Systems II: Express Briefs
71
3
페이지
1670 ~ 1676