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초록
The paper presents the design of reducing the output ripple voltage hysteretic buck converter with voltage sensing. Conventional buck converters has the advantage of fast response, but the high ripple voltage is disadvantageous. So, in this paper, the output ripple voltage is reducing by designing the hysteretic buck converter using voltage sensing. and disadvantage of voltage sensing is connected new voltage for complements. The designed ripple reduction controller is able to reduce the output ripple voltage more than 30%. The adaptive reduced output ripple voltage hysteretic buck converter is designed with 0.35 BCDMOS process
- 제목
- 전압 감지기를 이용한 히스테리틱 벅 변환기 설계
- 저자
- YOON KWANG SUB
- 학회명
- 2013년도 대한전자공학회 하계종합학술대회
- 개최지
- 제주도
- 학회 개최일
- 2013-07-03 ~ 2013-07-05