Scalable and High-Performance Number-Theoretic Transform Design for Lattice-Based Cryptography

초록

Efficient polynomial multiplication is a key operation in post-quantum cryptography (PQC) and homomorphic encryption (HE), particularly in lattice-based schemes where the number-theoretic transform (NTT) is the main contributor to computational cost. To address performance and efficiency challenges in these applications, this paper presents a scalable and high-performance NTT architecture tailored for practical deployments of PQC schemes and HE workloads. The proposed architecture features a mix of radix-2/4 fully pipelined datapath, a stage-aware modular reduction strategy combining K2RED and Montgomery methods, and a compressed twiddle factor storage that leverages symmetry and data access patterns. These innovations collectively enable high-performance NTT computation with minimized hardware costs. Synthesized on Xilinx UltraScale+ FPGA, the design achieves 3.71 KLUTs × ms for N=214, outperforming its predecessors. This architecture presents a compelling solution for FPGA-based cryptographic accelerators, delivering scalable performance across various transform sizes while adhering to practical deployment constraints. © 2025 IEEE.

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