Low-Temperature Deep Ultraviolet Laser Polycrystallization of Amorphous Silicon for Monolithic 3-Dimension Integration

  • Nguyen, Manh-Cuong; 
  • Yoon, Jiyeon; 
  • Nguyen, An Hoang-Thuy; 
  • Seok, Yeongcheol; 
  • Kim, Namhun; 
  • ... Choi, Rino; 
  • 외 2명
Citations

WEB OF SCIENCE

11
Citations

SCOPUS

13

초록

Monolithic 3-dimensional integration (M3D) requires heat treatment techniques that should not degrade the device performance of the lower layers when applied to device fabrication in the upper layers. Deep ultraviolet (DUV) laser annealing was implemented in the crystallization of amorphous silicon and source/drain junction activation to fabricate polycrystalline silicon (poly-Si) metal-oxide-semiconductor field-effect-transistors (MOSFETs) for upper-layer devices. The poly-Si MOSFET devices were fabricated successfully on top of the bottom electronic circuit layer (isolated by a thick silicon dioxide layer). Devices on the upper and lower layers were connected through interlayer vias to form a current-starved ring oscillator. The current-to-frequency converter on the bottom layer showed a reasonable increase in frequency as the current of the poly-Si MOSFET on the upper layer increased with increasing silicon grain size, confirming that DUV laser annealing did not degrade the performance of the bottom layer devices. This opens more opportunities for using DUV laser annealing in the M3D integration.

키워드

Annealing; Masers; MOSFET; Power lasers; Semiconductor lasers; Lasers; Amorphous silicon; Monolithic 3D; MOSFET; deep ultraviolet laser; low temperature; THIN-FILM; CMOS
제목
Low-Temperature Deep Ultraviolet Laser Polycrystallization of Amorphous Silicon for Monolithic 3-Dimension Integration
저자
Nguyen, Manh-Cuong; Yoon, Jiyeon; Nguyen, An Hoang-Thuy; Seok, Yeongcheol; Kim, Namhun; Kim, Hyewon; Kim, Sangwoo; Choi, Rino
DOI
10.1109/LED.2021.3074627
발행일
2021-06
유형
Article
저널명
IEEE Electron Device Letters
권
42
호
6
페이지
784 ~ 787