A 3.3V 10bit Current-mode Folding and Interpolating CMOS A/D Converter with an Arithmetic Folding Block

  • YOON KWANG SUB

초록

A low power 10bit current-mode folding and interpolating CMOS analog to digital converter(ADC) with arithmetic folding blocks is presented in this paper. A current-mode two-level folding amplifier with a high folding rate(FR) is designed not only to prevent ADC from increasing a FR excessively, but also to perform a high resolution at a single power supply of 3.3V.

제목
A 3.3V 10bit Current-mode Folding and Interpolating CMOS A/D Converter with an Arithmetic Folding Block
저자
YOON KWANG SUB
학회명
43rd IEEE Midwest Symposium on Circuits and Systems