High-k 유전박막 MIS 커패시터의 플라즈마 etching damage에 대한 연구

초록

In this paper, we studied plasma damage of MIS capacitor with Al2O3 dielectric film. Using capacitor pattern with the same area but different perimeters, we tried to separate etching damage mechanism and to optimize the dry etching process. After etching both metal and dielectric layer by the same condition, leakage current and C-V measurements were carried out for Pt/Al2O3/Si structures. The flatband voltage shift was appeared in the C-V plot, and it was caused by the variation of the fixed interface charge and the interface trapped charge. From I-V measurement, it was found the leakage current along the periphery could not be ignored. Finally, we established the process condition of RF power 300W, 100mTorr, Ar/Cl2 gas 60sccm as an optimal etching condition.