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초록
This paper describes the design and VLSI implementation of high throughput deblocking filter which adapted hybrid filtering order, single port memory and hierarchical structure
- 제목
- 3 Stage Pipelined Deblocking Filter for H.264/AVC
- 저자
- CHUNG DUCK JIN
- 학회명
- World Academy of Science, Engineering and Technology 2010
- 개최지
- PENANG
- 학회 개최일
- 2010-02-24 ~ 2010-02-26