A 6BIT 1GS/S FLASH A/D CONVERTER WITH FIR PRE-AMPLIFIER

  • YOON KWANG SUB

초록

A 6-bit flash A/D Converter with Full Input Range Pre-amplifier is introduced in this paper. The proposed flash architecture employs different input stage in the pre-amplifier for rail-to-rail input range. The simulation result show a conversion rate of 1GS/s, SNDR of 35.1dB, DNL/INL of ±0.45LSB/±0.65LSB, and power dissipation of 211mW at 1.8V. The proposed A/D Converter is simulated in a 0.18um CMOS technology.

제목
A 6BIT 1GS/S FLASH A/D CONVERTER WITH FIR PRE-AMPLIFIER
저자
YOON KWANG SUB
학회명
ISFT2009(International Symposium Fusion Technology2009)
개최지
인천 인하대학교 정석학술정보관
학회 개최일
2009-01-13 ~ 2009-01-15