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초록
In this paper, we report our proposed method for topography simulation of micro-electronic devices such as deposition and etching process. The proposed method simulates the advancement and backward movement of the surface by converting the cell structure into a tetrahedral mesh structure with topological information. The proposed scheme was verified with a test structure having 4 metal lines embedded in two types of non-planar dielectric layer and thereafter the capacitances were extracted. The simulation result exhibited about 8% maximum error, which seems to be relatively small in comparison to the one of the planar dielectric layer.
- 제목
- Topography Simulation for Structural Analysis Using Cell Advancing Method
- 저자
- WON TAEYOUNG
- 학회명
- Nanotechnology Conference and Trade Show Nanotech 2005