A Reconfigurable CMOS Power Amplifier Using Adaptive Biasing Technique for Wireless Monitoring Applications

초록

A fully integrated CMOS power amplifier (PA) using the adaptive biasing technique for wireless monitoring is presented. The adaptive biasing scheme is employed to compensate the input capacitance of both driver stage and power stage. Utilizing the adaptive biasing technique along with the low loss 2:1 voltage-controlled switch can enable dual-modes operation and eliminate the nonlinear effect at the common source of the conventional PAs and inherently enable the PAs to become immune to the capacitive variation of transistors. In the driver bypass (DB) and high gain (HG) modes, the PA has achieved an output power (Pout) of 0 dBm, drain efficiency (DE) of 35.1% and 26% and the power gain of 1 dB, 9.6 dB, respectively, under 0.7 voltage supply. The PA is implemented in a 0.13 mu m CMOS process with core area of 0.65 mm(2).

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