The effect of instruction window on the performance of superscalar

초록

This paper suggests a novel analytical model to predict average issue rate of both in-order and out-of-order issue policies. To prove the correctness of the model, thorough simulation was performed with Intel 80386/80387 instruction traces. Simulations showed that the proposed model can predict the issue rate accurately until the issue rates are saturated. The model employs parameters to characterize the behavior of programs and the structure of superscalar that cause performance bottle-neck. Thus, it can disclose the cause of a charge in performance and reduce the burden of excess simulations that should be performed whenever a new processor is designed