Design of an Inverter-Based 3rd Order Delta-Sigma Modulator Using 1.5bit Comparator

  • YOON KWANG SUB

초록

This paper describes the third order feedforward delta-sigma modulator with inverter-based integrators and a 1.5bit comparator for the application of audio signal processing. The modulator was designed with 0.18um CMOS standard process. The simulation results demonstrate the peak SNDR of 86.1 dB and the dynamic range of 89 dB with an input signal frequency of 2.5kHz, a sampling frequency of 2.56MHz, an input signal bandwidth of 20kHz, and an oversampling rate of 64.

제목
Design of an Inverter-Based 3rd Order Delta-Sigma Modulator Using 1.5bit Comparator
저자
YOON KWANG SUB
학회명
2015 International Conference on Information Technology and Engineering (ICTAE 2015)
개최지
Comfort Suites Yayuncun
학회 개최일
2015-08-12 ~ 2015-08-14