Design of a 3.3V high frequency CMOS VCO with an arithmetic functionality

초록

In recent years, the design of CMOS VCO at ever-higher frequencies has gained interest. This paper proposes a arithmetic functionality VCO circuit based on a differential ring oscillator for operating in high frequency. The proposed VCO architecture with half adder is able to produce two times higher frequency with any delay cell than conventional VCO. Simulation results show that the proposed VCO produce double oscillation frequency and power dissipation is 14.59 mW