Modeling and Simulation of 3D Structure for Gigabit DRAM

초록

In this paper, we present a 3D topography simulator, so called 3D-SURFILER, to model a complicated 3D structure on the substrate for gigabit DRAMs. The 3D-SURFILER comprises a deposition and etching simulator employing a cell advancing scheme and a parallel computational numerical engine. An MIM(Metal-Insulator-Metal) stacked capacitor has been chosen to verify the validity of the simulator.