Multi-Value Logic Gate Application on Single MoS2 Channel FET Using Two Different Metal Gates

초록

Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDC), are the most promising channel materials for future electronic devices due to their varied functions and unique electrical properties. As an example, TMDC-based nano-gapped split-gate FETs have been demonstrated for multi-functional logic gates for the future logic circuit applications based on a single semiconductor channel device [1]. Since Moore’s law was stated in 1965, the microchip processer system has been put toward developing the integration technique of the number of transistors on a single chip based on the very large scale integration (VLSI) technology [2]. However, it has already been saturated to sub-10 nm scaled channel device fabrication in the last few years. Therefore, modern computing systems based on binary digital logic circuits encounter the integration issues related to the device performances, such as computational clock, memory density, etc. To overcome the above-mentioned problem, ternary (multi-value) logic gates, one of the promising solutions, have been extensively studied using two-channel-based switching devices by many researchers worldwide. In this study, single channel-based multi-value logic gates were investigated by consisting of two different metal gate electrodes having different work functions. Two different metal gate electrodes, Ag (qΦm ~4.26eV) and Pt (qΦm ~5.65eV), were laterally formed on the MoS2 channel. The different workfunction brought the threshold voltage shift of the MoS2 switching device. As a result, our MoS2 FET showed the humped transfer characteristics curves for the ternary logic gate circuit applications.

제목
Multi-Value Logic Gate Application on Single MoS2 Channel FET Using Two Different Metal Gates
저자
LEE YOUNG TACK
학회명
한국전기전자재료학회 2022년도 하계학술대회