상세 보기
초록
This paper propose algorithm that design the highly parallel mutiple-valued logic digital circuit. By Nakajima proposed algorithm not always fit all case of DTG. If nodes of DTG gather a some level, it can not apply to design circuit design and optimal over GF(p). In this paper proposed algorithm can design all case of DTG because of k consist of positive number by add extra nodes each level.
- 제목
- A Study on the design of linear Multiple-valued logic Systems based on the Directed Tree Graph
- 저자
- Kim Heung Soo
- 학회명
- ITC-CSCC