Selective Silane Treatment on SiO2 Dielectric Layer Targeting the Optimization of Hybrid Bonding Process

초록

The bonding properties of SiO2-SiO2 interfaces in Cu/SiO2 hybrid bonding (HB) are optimized through selective silane treatment. Specifically, the Cu/SiO2 hybrid bonding chips are immersed in various silane solutions, including 2.0 wt% (3-aminopropyl) triethoxysilane (APTES), octyltriethoxysilane (OTES), and hexadecyltriethoxysilane (HDTES). It is confirmed that APTES is selectively coated on the insulating SiO2 by forming Si-O-Si bonds through hydrolysis and condensation reactions. The gap between the SiO2 layers is reduced to ca. 20 nm, confirming its applicability for the HB process. The 2.0 wt% APTES-treated HB chips are then heated at 300 ℃ without Cu pad surface treatment, enhancing the reliability of SiO2-SiO2 bonding. This study suggests a simplified low-temperature HB process for the development of advanced packaging. 본 연구성과물은 2025년도 정부(교육부)의 재원으로 한국연구재단의 지원을 받아 수행된 기초연구 사업임 (RS-2024-00464661).