Design of a low power 12-bit 5-Msps SAR A/D converter with sampling clock's duty ratio regulation circuit

초록

This paper proposes a 12-bit, 5Msps SAR A/D Converter for bio-farm and wearable device sensor-signal processing. The proposed A/D Converter based on 1poly-6metal 180nm CMOS process. The proposed SAR A/D Converter consisgts of SAR control logic, comparator, C-DAC array, Output register. The simulation results of the proposed circuit demonstrate the ENOB of 10.2-bit, INL/DNL of ±1.4LSB / ±0.7LSB, power consumption of 53.4uW, and Walden FoM of 7.96fJ/step.