A novle algorithm for reducing the waveform distortion in the PWM inverter with low output voltage

초록

The dead times in PWM inverters causes an amplitude reduction and a harmonics of the output voltage. Various compensation schemes are proposed during the last few decades. Whenever the modulation index goes lower with the low output frequencies, those schemes do not work well due to the zero clamping phenomenons. In this paper, a novel algorithm is proposed in order to reducing the waveform distortion of PWM inverters. During the PWM, there exist self-commutation devices that are not turned-on even if the gate drive signal is offered. The proposed algorithm is made up of the prohibiting the gate signals. Simulations examine the validity of the proposed algorithm