A Novle Dead Time Minimization Algorithm of the PWM Inverter

초록

The dead time in inverters is necessary for preventing the short circuit of DC source. However, the dead time may cause serious problems such as waveform distortion, voltage drop, increased torque ripple and heating of the motors. In this paper, a dead time minimization algorithm is proposed for improving the inverter output performance. The proposed algorithm consists of forbidding unnecessary triggers for the inverter switches that are not turned on although the gate drive signal is impressed. The validity of the proposed method is verified by comparing the simulation and experimental results with those of the conventional methods. It is concluded from the results that the proposed algorithm can reduce the output current harmonics and the number of inverter switchings.