J-MISFET Hybrid Dual-Gate Switching Device for Multifunctional Optoelectronic Logic Gate Applications

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초록

High-performance and low operating voltage are becoming increasingly significant device parameters to meet the needs of future integrated circuit (IC) processors and ensure their energy-efficient use in upcoming mobile devices. In this study, we suggest a hybrid dual-gate switching device consisting of the vertically stacked junction and metal-insulator-semiconductor (MIS) gate structure, named J-MISFET. It shows excellent device performances of low operating voltage (<0.5 V), drain current ON/OFF ratio (similar to 4.7 x 10(5)), negligible hysteresis window (<0.5 mV), and near-ideal subthreshold slope (SS) (60 mV/dec), making it suitable for low-power switching operation. Furthermore, we investigated the switchable NAND/NOR logic gate operations and the photoresponse characteristics of the J-MISFET under the small supply voltage (0.5 V). To advance the applications further, we successfully demonstrated an integrated optoelectronic security logic system comprising 2-electric inputs (for encrypted data) and 1-photonic input signal (for password key) as a hardware security device for data protection. Thus, we believe that our J-MISFET, with its heterogeneous hybrid gate structures, will illuminate the path toward future device configurations for next-generation low-power electronics and multifunctional security logic systems in a data-driven society.

키워드

JFETMISFEThybrid dual-gate FETswitchable logicoptoelectronic security logic systemFIELD-EFFECT TRANSISTORSATOMICALLY THINMOS2HETEROJUNCTIONMOBILITYCONTACTMETAL
제목
J-MISFET Hybrid Dual-Gate Switching Device for Multifunctional Optoelectronic Logic Gate Applications
저자
Yu, Si EunLee, Han JooKim, Min-guIm, SeongilLee, Young Tack
DOI
10.1021/acsnano.4c01450
발행일
2024-04
유형
Article
저널명
ACS Nano
18
17
페이지
11404 ~ 11415