3D Topograpical Simulation for TFT-LCD Structure

초록

In this paper, we propose a novel method for topography simulation in micro-electronic processes such as deposition and etching processes. We demonstrate the applicability of three-dimensional process simulation. The proposed scheme comprises steps of calculating the forward and backward movement of the surface and converting the cell structure into a tetrahedral mesh structure with topological information. Memory requirements are mitigated through a dynamic allocating scheme which takes only the surface cells under consideration. For the removal of cells, a fixed time step is employed while volume remains in the surface cells. A spillover algorithm has also been devised in order to consider the case when more volume has to be removed from a cell during a single time step.