Polysilicon-Channel Synaptic Transistors for Implementation of Short- and Long-Term Memory Characteristics

초록

The rapid progress of artificial neural networks (ANN) is largely attributed to the development of the rectified linear unit (ReLU) activation function. However, the implementation of software-based ANNs, such as convolutional neural networks (CNN), within the von Neumann architecture faces limitations due to its sequential processing mechanism. To overcome this challenge, research on hardware neuromorphic systems based on spiking neural networks (SNN) has gained significant interest. Artificial synapse, a crucial building block in these systems, has predominantly utilized resistive memory-based memristors. However, the two-terminal structure of memristors presents difficulties in processing feedback signals from the post-synaptic neuron, and without an additional rectifying device it is challenging to prevent sneak current paths. In this paper, we propose a four-terminal synaptic transistor with an asymmetric dual-gate structure as a solution to the limitations of two-terminal memristors. Similar to biological synapses, the proposed device multiplies the presynaptic input signal with stored synaptic weight information and transmits the result to the postsynaptic neuron. Weight modulation is explored through both hot carrier injection (HCI) and Fowler-Nordheim (FN) tunneling. Moreover, we investigate the incorporation of short-term memory properties by adopting polysilicon grain boundaries as temporary storage. It is anticipated that the devised synaptic devices, possessing both short-term and long-term memory characteristics, will enable the implementation of various novel ANN algorithms.

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