A Two-Step Time-to-Digital Converter using Ring Oscillator Time Amplifier

  • Kim, Min
  • Son, Kyung-Sub
  • Kim, Namhoon
  • Rho, Chang Hang
  • Kang, Jin-Ku
Citations

WEB OF SCIENCE

6
Citations

SCOPUS

7

초록

A two-step time-to-digital converter using a ring oscillator time amplifier is presented. The time amplifier structure does not accumulates the error in the iterative process of time. There are 8 bits in total, of which 4 bits are obtained in the coarse conversion and 4 bits are obtained in the fine conversion by amplifying the remaining time. The TDC circuit occupied an area of 0.34 mm(2) using 180 nm CMOS process. The effective number of bits is 7.42bits. The TDC circuit has shown 10.5 ps resolution for a 50 MHz. The DNL and INL are 0.7(LSB) and 0.5(LSB), respectively. The power consumption is 1.34 mW with a 1.8 V supply.

키워드

DPLL (Digital-Phase locked loop)TDC (Time-to-Digital Converter)Two-Step TDC
제목
A Two-Step Time-to-Digital Converter using Ring Oscillator Time Amplifier
저자
Kim, MinSon, Kyung-SubKim, NamhoonRho, Chang HangKang, Jin-Ku
발행일
2018
유형
Proceedings Paper
저널명
2018 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC)
페이지
143 ~ 144