Recovery Operation in HfZrOx-Based FeFETs With Interfacial Layer Scavenging

초록

This work investigates the recovery operation and interfacial layer (IL) scavenging to improve the performance and reliability of HfZrOx-based ferroelectric field-effect transistors (FeFETs). A systematic electrical characterization demonstrated that IL scavenging reduces the operating voltage and initial interface traps while mitigating interface trap generation and ferroelectric fatigue induced by stress cycling, thereby improving memory window (MW) recovery capability. In addition, by investigating the frequency of recovery pulses under iso-time conditions, we found that lower frequencies are favorable for complete MW recovery. Our findings offer a valuable understanding of the degradation and recovery mechanisms in FeFETs, underscoring the critical role of recovery speed and controlled IL.

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