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1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range
- Kim, Jin-Ho;
- Kim, Tae Ho;
- Lee, Hyung-Wook;
- Park, Jeong-Mi;
- Kang, Jin-Ku
Citations
WEB OF SCIENCE
4Citations
SCOPUS
5초록
This brief describes a low power quarter-rate single-loop clock and data recovery circuit (CDR) without a reference clock. A new frequency acquisition method is proposed, featuring unlimited frequency capture range and a short locking time. The proposed CDR has been designed and fabricated in a 28nm CMOS process, and measurement results show a capture range of 1.4Gb/s to 8Gb/s over the full voltage-controlled oscillator (VCO) operating range, with a locking time of approximately 1.37 mu s . The power efficiency is 0.71 [pJ/bit] at 8Gb/s input data.
키워드
Voltage-controlled oscillators; Time-frequency analysis; Clocks; Frequency measurement; Detectors; Power demand; Periodic structures; Clock and data recovery (CDR); low power CDR; oversampling CDR power issue; quarter rate CDR; single-loop CDR; unlimited capture range; DATA RECOVERY CIRCUIT; RATE DIGITAL CDR; FREQUENCY ACQUISITION; CLOCK
- 제목
- 1.4-8 Gb/s Low Power Quarter-Rate Single-Loop Referenceless CDR With Unlimited Capture Range
- 저자
- Kim, Jin-Ho; Kim, Tae Ho; Lee, Hyung-Wook; Park, Jeong-Mi; Kang, Jin-Ku
- 발행일
- 2024-09
- 유형
- Article
- 권
- 71
- 호
- 9
- 페이지
- 4061 ~ 4065